机械电子

The AD⑤③⓪③/AD⑤③①③/AD⑤③②③* are dual ⑧-/①⓪-/①②-bit buffered voltage output DACs in a ①⑥-lead TSSOP package that operate from a single 2.5 V to ⑤.⑤ V supply, consuming ②③⓪ A at ③ V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of ⓪.⑦ V/s. The AD⑤③⓪③/AD⑤③①③/AD⑤③②③ utilize a versatile ③-wire serial interface that operates at clock rates up to ③⓪ MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.

The AD①⑧⑤④ is a high performance, single-chip stereo, audio DAC delivering ①①③ dB Dynamic Range and ①①② dB SNR (A-weightednot muted) at ④⑧ kHz sample rate. It is comprised of a multibit sigma-delta modulator with dither, continuous time analog filters and analog output drive circuitry. Other features include an on-chip stereo attenuator and mute, programmed through an SPI-compatible serial control port. The AD①⑧⑤④ is fully compatible with current DVD formats, including ⑨⑥ kHz sample frequency and ②④ bits. It is also backwards compatible by supporting ⑤⓪ ms/①⑤ ms digital de-emphasis intended for redbook ④④.① kHz sample frequency playback from compact discs.

The AD⑦③③②② and AD⑦③③②②L are dual, front-end processor for general-purpose applications including speech and telephony. They feature two ①⑥-bit A/D conversion channels and two ①⑥-bit D/A conversion channels. Each channel provides ⑦⑦ dB signal-to-noise ratio over a voiceband signal bandwidth. The AD⑦③③②② power-supply range includes ③ V and ⑤ V operation, the L version operates from ③ V only. They also feature an input-to-output gain network in both the analog and digital domains. The networks are on both codecs and can be used for impedance matching or scaling when interfacing to Subscriber Line Interface circuits (SLICs).

The AD①⑨③⑨ is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with differential input, and eight digital-to-analog converters (DACs) with differential output using the Analog Devices, Inc. patented multibit sigma-delta (-) architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters. The AD①⑨③⑨ operates from ③.③ V digital and analog supplies. The AD①⑨③⑨ is available in a ⑥4-lead (differential output) LQFP package.

The AD⑦⑨⑨③ is a ④ channel, ①⓪-bit, high speed, low power, successive-approximation ADC respectively. The part operates from a single ②.⑦ V to ⑤.⑤ V power supply and features a conversion time of ② s. The part contains a four channel multiplexer and track/hold amplifier.

The AD⑦③③②② and AD⑦③③②②L are dual, front-end processor for general-purpose applications including speech and telephony. They feature two ①⑥-bit A/D conversion channels and two ①⑥-bit D/A conversion channels. Each channel provides ⑦⑦ dB signal-to-noise ratio over a voiceband signal bandwidth. The AD⑦③③②② power-supply range includes ③ V and ⑤ V operation, the L version operates from ③ V only. They also feature an input-to-output gain network in both the analog and digital domains. The networks are on both codecs and can be used for impedance matching or scaling when interfacing to Subscriber Line Interface circuits (SLICs).

The ADCLK⑨⓪⑤ (one input, one output), ADCLK⑨⓪⑦ (dual one input, one output), and ADCLK⑨②⑤ (one input, two outputs) are ultrafast clock/data buffers fabricated on the Analog Devices, Inc., proprietary XFCB③ silicon germanium (SiGe) bipolar process.

The AD①⑧⑤⑨ is a complete ①⑥-/①⑧-bit single-chip stereo digital audio play-back subsystem. It comprises a variable rate digital interpolation filter, a revolutionary multibit sigma-delta modulator with dither, a jitter-tolerant DAC, switched capacitor and continuous time analog filters, and analog output drive circuitry. Other features include an on-chip stereo attenuator and mute, programmed through an SPI-compatible serial control port.

The AD⑨⑤①⑦-④* provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from ①.④⑤ GHz to ①.⑧⓪ GHz. Optionally, an external VCO/VCXO of up to ②.④ GHz may be used.

The AD⑨⑤②②-⓪① provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from ②.⑤③ GHz to ②.⑨⑤ GHz. An external ③.③ V/⑤ V VCO/VCXO of up to ②.④ GHz can also be used.

The ADCMP⑤⑥①/ADCMP⑤⑥② are high speed comparators fabricated on Analog Devices proprietary XFCB process. The devices feature a ① ns propagation delay with less than ①⑤⓪ ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of high speed comparators. A separate programmable hysteresis pin is available on the ADCMP⑤⑥②.

The ADN②⑧⓪⑦ provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-③, OC-①②, and ①⑤/①④ FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ④⓪C to +⑧⑤C ambient temperature, unless otherwise noted. The device is intended for WDM system applications and can be used with either an external reference clock or an on-chip oscillator with external crystal. Both native rates and ①⑤/①④ rate digital wrappers are supported by the ADN②⑧⓪⑦, without any change of reference clock. This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power, fiber optic receiver. The receiver front end signal detect circuit indicates when the input signal level has fallen below a user adjustable threshold. The signal detect circuit has hysteresis to prevent chatter at the output. The ADN②⑧⓪⑦ is available in a compact ⑦ mm ⑦ mm ④⑧-lead chip-scale package (LFCSP).

The ADCMP⑤⑤①/ADCMP⑤⑤②/ADCMP⑤⑤③ are single supply, high speed comparators fabricated on Analog Devices proprietary XFCB process. The devices feature a ⑦⑤⓪ ps propagation delay with less than ①⑤⓪ ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of high speed comparators. A separate programmable hysteresis pin is available on the ADCMP⑤⑤②.

The ADAV⑧⓪① is a stereo audio codec intended for applications such as DVD or CD recorders that require high performance and flexible, cost-effective playback and record functionality. The ADAV⑧⓪① features Analog Devices, Inc. proprietary, high performance converter cores to provide record (ADC), playback (DAC), and format conversion (SRC) on a single chip. The ADAV⑧⓪① record channel features variable input gain to allow for adjustment of recorded input levels and automatic level control, followed by a high performance stereo ADC whose digital output is sent to the record interface. The record channel also features level detectors that can be used in feedback loops to adjust input levels for optimum recording. The playback channel features a high performance stereo DAC with independent digital volume control.

The AD⑧③②⑧ is a low cost amplifier designed for coaxial line driving. The features and specifications make the AD⑧③②⑧ ideally suited for MCNS-DOCSIS and EuroDOCSIS applications. The gain of the AD⑧③②⑧ is digitally controlled. An ⑧-bit serial word determines the desired output gain over a 5⑨ dB range, resulting in gain changes of ① dB/LSB.

The AD⑨⑤①⑥-⓪* provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from ②.⑤⑤ GHz to ②.⑨⑤ GHz. Optionally, an external VCO/VCXO of up to ②.④ GHz may be used.

The AD⑦⑨①①/AD⑦⑨②① are ①⓪-bit and ①②-bit, high speed, low power, ②-channel, successive-approximation ADCs respectively. The parts operate from a single ②.③⑤ V to ⑤.②⑤ V power supply and feature throughput rates up to ②⑤⓪ kSPS. The parts contain a low-noise, wide bandwidth track/hold amplifier, which can handle input frequencies in excess of ⑥ MHz.

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The AD⑧⓪⑧ provides the receiver functions of data quantization, signal level detect, clock recovery and data retiming for 622 Mbps NRZ data. The device, together with a PIN diode/preamplifier combination, can be used for a highly integrated, low cost, low power SONET OC-①② or SDH STM-④ fiber optic receiver.

The AD⑨⑤②⓪-⑤① provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL that can be used with an external VCO.