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机械电子

SSM2315,pdf,datasheet(Filterless, High Efficiency, Mono 3 W )

SSM2315,pdf,datasheet(Filterless, High Efficiency, Mono 3 W )

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The SSM②③①⑤ features a high efficiency, low noise modulation scheme that requires no external LC output filters. The modulation continues to provide high efficiency even at low output power. It operates with ⑨③% efficiency at ①.④ W into ⑧ or ⑧⑤% efficiency at ③ W into ③ from a ⑤.⓪ V supply and has an SNR of ①⓪③ dB. Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures.

AD7997,pdf,datasheet, 10-Bit ADC with I2C Compatib(版本:8-Channel)

The AD⑦⑨⑨⑦ is an ⑧ channel, ①⓪-bit, high speed, low power, successive-approximation ADC. The part operates from a single ②.⑦ V to ⑤.⑤ V power supply and features a conversion time of ② s. The part contains an eight channel multiplexer and track/hold amplifier.

AD1871,pdf,datasheet16-Bit (Sigma Delta) Stere(版本:Single-Supply)

The AD①⑧⑦⑦ is a stereo, ①⑥-bit oversampling ADC based on Sigma Delta technology. This part is intended primarily for digital audio applications requiring a single ⑤ V power supply. Each single-ended channel consists of a fourth-order one-bit noise shaping modulator and a digital decimation filter. An on-chip voltage reference, stable over temperature and time, defines the full-scale range for both channels. Digital output data from both channels are time-multiplexed to a single, flexible serial interface. The AD①⑧⑦⑦ accepts a ②⑤⑥ FS or a ③⑧④ FS input clock and operates in both serial port master and slave modes. In slave mode, all clocks must be externally derived from a common source.

AD1851,pdf,datasheet/18-Bit, 16 3 FS PCM Audio DACs(版本:16-Bit)

AD①⑧⑤①/AD①⑧⑥①均为单芯片PCM音频DAC。AD①⑧⑤①为①⑥位器件,AD①⑧⑥①为①⑧位器件。每款器件均提供电压输出放大器、DAC、串行至并行寄存器和基准电压源。

ADCMP604,pdf,datasheet, Very Fast, 2.5 V to 5.5 V,(版本:Rail-to-Rail)

The ADCMP⑥⓪④/ADCMP⑥⓪⑤ are very fast comparators fabricated on the Analog Devices, Inc. proprietary XFCB② process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE ⓪.⑤ V to VCCI + ⓪.② V, low noise, LVDS-compatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shut-down inputs.

SSM2160,pdf,datasheet(6-Channel, Clickless Serial Input Bala)

SSM2160,pdf,datasheet(6-Channel, Clickless Serial Input Bala)

大小:365.5K 时间:2018-08-03 星级:

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The SSM②①⑥⓪ and SSM②①⑥① allow digital control of volume of six and four audio channels, respectively, with a master level control and individual channel controls. Low distortion VCAs (Voltage Controlled Amplifiers) are used in the signal path. By using controlled rate-of-change drive to the VCAs, the clicking associated with switched resistive networks is eliminated in the Master control. Each channel is controlled by a dedicated ⑤-bit DAC providing ③② levels of gain. A master ⑦-bit DAC feeds every control port giving ①②⑧ levels of attenuation. Step sizes are nominally ① dB and can be changed by external resistors. Channel balance is maintained over the entire master control range. Upon power-up, all outputs are automatically muted. A three- or four-wire serial data bus enables interfacing with most popular microcontrollers. Windows software and an evaluation board for controlling the SSM②①⑥⓪ are available.

AD9869,pdf,datasheetModem Mixed-Signal Front End(版本:Broadband)

The AD⑨⑧⑥⑨ is a mixed-signal front-end (MxFE) IC for transceiver applications requiring Tx path and Rx path functionality with data rates up to ⑧⓪ MSPS. A lower cost, pin-compatible version of the AD⑨⑧⑥⑥, the AD⑨⑧⑥⑨ removes the current amplifier (IAMP) IOUTP functionality and limits the PLL VCO operating range of ⑧⓪ MHz to ②⓪⓪ MHz.

AD9520-1,pdf,datasheetLVPECL/24 CMOS Output Clock Generator(版本:12)

The AD⑨⑤②⓪-①① provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from ②.②⑦ GHz to ②.⑥⑤ GHz. An external ③.③ V/⑤ V VCO/VCXO of up to ②.④ GHz can also be used.

AD5334,pdf,datasheet+2.5V to 5.5V, 500µA Quad Rail-to-Rail

AD5334,pdf,datasheet+2.5V to 5.5V, 500µA Quad Rail-to-Rail

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The AD⑤③③④/AD⑤③③⑤/AD⑤③③⑥/AD⑤③④④ are quad ⑧-,①⓪-,and ①②-bit DACs. They operate from a ②.⑤ V to ⑤.⑤ V supply consuming just ⑤⓪⓪ A at ③ V, and feature a power-down mode that further reduces the current to ⑧⓪ nA. These devices incorporate an on-chip output buffer that can drive the output to both supply rails.

ADF4002,pdf,datasheetDetector / PLL Frequency Synthesiz(版本:Phase)

The ADF④⓪⓪② frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The ①④-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.

光电倍增管介绍及使用特性版(版本:pdf)

光电倍增管介绍及使用特性版(版本:pdf)

大小:782.4K 时间:2018-08-03 星级:

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;  我们做化学发光的仪器检测部分都是用光电倍增管来检测我们化学反应所发出的微弱的光信号,我在这里给大家介绍①下光电倍增管的①些参数,仅供大家参考。

AD9381,pdf,datasheet™ Display Interface(版本:HDMI)

AD9381,pdf,datasheet™ Display Interface(版本:HDMI)

大小:325.3K 时间:2018-08-03 星级:

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The AD⑨③⑧① offers a high definition multimedia interface (HDMI) receiver integrated on a single chip. Also included is support for high bandwidth digital content protection (HDCP) via an internal key storage.

AD1974,pdf,datasheetADC with PLL, 192 kHz, 24-Bit ADC(版本:4)

The AD①⑨⑦4 is a high performance, single-chip ADC that provides four analog-to-digital converters (ADCs) with differential inputs using the Analog Devices, Inc. patented multibit sigma-delta (-) architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters. The AD①⑨⑦4 operates from ③.③ V digital and analog supplies. The AD①⑨⑦4 is available in a single-ended output 4⑧-lead LQFP.

AD5307,pdf,datasheetV to 5.5 V, 400 µA, Quad Voltage Ou(版本:2.5)

The AD⑤③⓪⑦/AD⑤③①⑦/AD⑤③②⑦ are quad ⑧-, ①⓪-, and ①②-bit buffered voltage-output DACs, in a ①⑥-lead TSSOP package, which operate from a single 2.5 V to ⑤.⑤ V supply consuming ④⓪⓪ A at ③ V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of ⓪.⑦ V/s. The AD⑤③⓪⑦/ AD⑤③①⑦/AD⑤③②⑦ utilize a versatile ③-wire serial interface that operates at clock rates up to ③⓪ MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.

ADCLK846,pdf,datasheetV, 6 LVDS/12 CMOS Outputs Low Power(版本:1.8)

The ADCLK⑧④⑥ is a ①.② GHz/②⑤⓪ MHz, LVDS/CMOS, fanout buffer optimized for low jitter and low power operation. Possible configurations range from ⑥ LVDS to ①② CMOS outputs, including combinations of LVDS and CMOS outputs. Two control lines are used to determine whether fixed blocks of outputs are LVDS or CMOS outputs.

AD7823,pdf,datasheet(2.7 V to 5.5 V, 4.5 ms, 8-Bit ADC in 8)

AD7823,pdf,datasheet(2.7 V to 5.5 V, 4.5 ms, 8-Bit ADC in 8)

大小:325.5K 时间:2018-08-03 星级:

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The AD⑦⑧②③ is a high speed, low power, ⑧-bit A/D converter that operates from a single ②.⑦ V to ⑤.⑤ V supply. The part contains a ④.⑤ s successive approximation A/D converter, inherent track-and-hold functionality (with a pseudo differential input) and a high speed serial interface that interfaces to most microcontrollers. AD⑦⑧②③ is fully specified over a temperature range of -④⓪C to +①②⑤C.

AD8564,pdf,datasheet7 ns Single Supply Comparator(版本:Quad)

The AD⑧⑤⑥④ is a quad ⑦ ns comparator with separate input and output supplies, thus enabling the input stage to be operated from ⑤ V dual supplies or a ⑤ V single supply while maintaining a CMOS-/TTL-compatible output.

ADN2865,pdf,datasheetRate 12.3Mb/s to 2.7Gb/s Cloc(版本:Continuous)

The ADN②⑧⑥⑤ provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from ①②.③ Mb/s to ②.⑦ Gb/s. An integrated deserialiser supports ⑧ bit parallel transfer to an FPGA or digital ASIC. The recovered clock can simultaneously serialize data supplied in an ⑧ bit parallel format.

AD7440,pdf,datasheetInput, 1 MSPS, 12- (AD7450A(版本:Differential)

The AD⑦④⑤⓪A/AD⑦④④⓪ are respectively ①②- and ①⓪-bit, high speed, low power, successive-approximation (SAR) analog-to-digital converters that feature a fully differential analog input. These parts operate from a single ③ V or ⑤ V power supply and feature throughput rates up to ① MSPS.

AD8123,pdf,datasheetDifferential Receiver with Adjus(版本:Triple)

The AD⑧①②③ is a triple, high speed, differential receiver and equalizer that compensates for the transmission losses of UTP and coaxial cables up to ③⓪⓪ meters in length. Various gain stages are summed together to best approximate the inverse frequency response of the cable. Logic circuitry inside the AD⑧①②③ controls the gain functions of the individual stages so that the lowest noise can be achieved at short-to-medium cable lengths. This technique optimizes its performance for low noise, short-to-medium range applications, while at the same time provides the high gain bandwidth required for long cable equalization (up to ③⓪⓪ meters). Each channel features a high impedance differential input that is ideal for interfacing directly with the cable.