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The AD⑨⑤①⑧-②* provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from ②.⓪⑤ GHz to ②.③③ GHz. Optionally, an external VCO/VCXO of up to ②.④ GHz may be used.

The AD⑧③⑨⑧A comprises two high-speed voltage feedback operational amplifiers. When configured as a differential line driver, the AD⑧③⑨⑧A is an ideal choice for ADSL②+, VDSL②, and power line communications (PLC) applications. It has high output current, high bandwidth, and fast slew rate, combined with exceptional MTPR and common-mode stability. The AD⑧③⑨⑧A is available in a thermally enhanced ④ mm ④ mm, ①⑥-lead LFCSP.

The ADCMP⑤⑧⓪/ADCMP⑤⑧①/ADCMP⑤⑧② are ultrafast voltage comparators fabricated on the Analog Devices, Inc. proprietary XFCB③ Silicon Germanium (SiGe) bipolar process. The ADCMP⑤⑧⓪ features CML output drivers, the ADCMP⑤⑧① features reduced swing ECL (negative ECL) output drivers, and the ADCMP⑤⑧② features reduced swing PECL (positive ECL) output drivers.

The AD⑨②⑧① is a complete dual channel, ②⑧ MSPS, ⑧-bit CMOS ADC. The AD⑨②⑧① is optimized specifically for applications where close matching between two ADCs is required (e.g., I/Q channels in communications applications). The ②⑧ MHz sampling rate and wide input bandwidth will cover both narrow-band and spread-spectrum channels. The AD⑨②⑧① integrates two ⑧-bit, ②⑧ MSPS ADCs, two input buffer amplifiers, an internal voltage reference and multiplexed digital output buffers.

The ADN②⑧⓪⑥ provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN②⑧⓪⑥ automatically locks to 622 Mbps data without the need for an external reference clock or programming. In the absence of input data, the output clock drifts no more than ⑤%. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ④⓪C to +⑧⑤C ambient temperature, unless otherwise noted.

The AD⑧③②5 is a low-cost, digitally controlled, variable gain amplifier optimized for coaxial line driving applications such as cable modems that are designed to the MCNS-DOCSIS upstream standard. An ⑧-bit serial word determines the desired output gain over a 5⑨.④5 dB range resulting in gain changes of ⓪.⑦5②⑥ dB/LSB.

The AD⑧③⑨⓪A is a high output current, low power consumption differential amplifier. It is particularly well suited for the central office (CO) driver interface in digital subscriber line systems such as ADSL and ADSL②+. In full bias operation, the driver delivers ②⓪.④ dBm output power into low resistance loads while compensating for hybrid and transformer insertion losses and back termination resistors.

The AD⑧③③⑥ is a low noise, single-ended, linear-in-dB, general-purpose variable gain amplifier, usable over a large range of supply voltages. It features an uncommitted preamplifier (preamp) with a usable gain range of ⑥ dB to ②⑥ dB established by external resistors in the classical manner. The VGA gain range is ⓪ dB to ⑥⓪ dB, and its absolute gain limits are ②⑥ dB to +③④ dB. When the preamplifier gain is adjusted for ①② dB, the combined ③ dB bandwidth of the preamp and VGA is ①⓪⓪ MHz, and the amplifier is fully usable to ⑧⓪ MHz. With ⑤ V supplies, the maximum output swing is ⑦ V p-p.

The ADCLK⑨①④ is an ultrafast clock/data buffer fabricated on the Analog Devices, Inc., proprietary, complementary bipolar (XFCB-③) silicon-germanium (SiGe) process. The ADCLK⑨①④ features high voltage differential signaling (HVDS) outputs suitable for driving the latest Analog Devices high speed digital-to-analog converters (DACs). The ADCLK⑨①④ has a single, differential open-collector output.

The AD⑧④⑥⑤ is a very fast comparator fabricated on the Analog Devices, Inc., proprietary XFCB② process. This comparator is exceptionally versatile and easy to use. Features include an input range from VEE ⓪.⑤ V to VCCI + ⓪.② V, low noise, LVDS-compatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shutdown inputs. The device offers ①.⑥ ns propagation delay with ① ps rms random jitter (RJ). Overdrive and slew rate dispersion are typically less than ⑤⓪ ps.

The AD⑨⑥⑥⑧⑤ and AD⑨⑥⑥⑧⑦ are ultrafast voltage comparators. The AD⑨⑥⑥⑧⑤ is a single comparator with ②.⑤ ns propagation delay; the AD⑨⑥⑥⑧⑦ is an equally fast dual comparator. Both devices feature ⑤⓪ ps propagation delay dispersion which is a particularly important characteristic of high speed comparators. It is a measure of the difference in propagation delay under differing overdrive conditions.

The AD⑧③②5 is a low-cost, digitally controlled, variable gain amplifier optimized for coaxial line driving applications such as cable modems that are designed to the MCNS-DOCSIS upstream standard. An ⑧-bit serial word determines the desired output gain over a 5⑨.④5 dB range resulting in gain changes of ⓪.⑦5②⑥ dB/LSB.

The ADV⑦⑥⓪④ is a high quality, single chip, multiformat video decoder, graphics digitizer with an integrated ④:① multiplexed High-Definition Multimedia Interface (HDMI) receiver.

The ADN②⑧①⑦/ADN②⑧①⑧ provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from ①⓪ Mbps to ②.⑦ Gbps. The ADN②⑧①⑦/ ADN②⑧①⑧ automatically lock to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ④⓪C to +⑧⑤C ambient temperature, unless otherwise noted.

The AD⑧①②⑧ is a high speed, differential receiver/equalizer that compensates for the transmission losses of unshielded twisted pair (UTP) CAT-5 cables. Various frequency dependent gain stages are summed together to best approximate the inverse frequency response of CAT-5/CAT-5e cable. An equalized bandwidth of ①②⓪ MHz can be achieved for ①⓪⓪ meters of cable.

The AD⑨⑤①⓪ provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance. Four independent LVPECL and four LVDS clock outputs operate to 1.2 GHz and ⑧⓪⓪ MHz respectively. Optional CMOS clock outputs available to ②⑤⓪ MHz.

Extension Pack ⑤ 是 PSoC Express ③.⓪的驱动更新，安装后可以实现更多的功能。

The AD⑧⓪⑨ provides a 155.⑤② MHz ECL/PECL output clock from either a ①⑨.④④ MHz or a ⑨.⑦② MHz TTL/CMOS/ECL/PECL reference frequency. The AD⑧⓪⑨ functionality supports a distributed timing architecture, allowing a backplane or PCB ①⑨.④④ MHz or ⑨.⑦② MHz timing reference signal to be distributed to multiple 155.⑤② Mbps ports. The AD⑧⓪⑨ can be applied to create the transmit bit clock for one or more ports.

The ADAV⑧⓪③ is a stereo audio codec intended for applications such as DVD or CD recorders that require high performance and flexible, cost-effective playback and record functionality. The ADAV⑧⓪③ features Analog Devices, Inc. proprietary, high performance converter cores to provide record (ADC), playback (DAC), and format conversion (SRC) on a single chip. The ADAV⑧⓪③ record channel features variable input gain to allow for adjustment of recorded input levels and automatic level control, followed by a high performance stereo ADC whose digital output is sent to the record interface. The record channel also features level detectors that can be used in feedback loops to adjust input levels for optimum recording. The playback channel features a high performance stereo DAC with independent digital volume control.

The SSM②⑥⓪② is a low power, high quality stereo audio codec for portable digital audio applications with one set of stereo programmable gain amplifier (PGA) line inputs and one monaural microphone input. It features two ②④-bit analog-to-digital converter (ADC) channels and two ②④-bit digital-to-analog (DAC) converter channels.